The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier
Assaad, R.S.
Silva-Martinez, J.
Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX, USA;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Sept. 2009
Volume: 44,
Issue: 9
On page(s): 2535-2542
ISSN: 0018-9200
INSPEC Accession Number: 10846952
Digital Object Identifier: 10.1109/JSSC.2009.2024819
Current Version Published: 2009-08-28
Abstract
A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mum CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mus versus 42.1 V/mus) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.
Index
Terms
Available to subscribers and IEEE members.
References
Available to subscribers and IEEE members.
Citing Documents
Available to subscribers and IEEE members.
Cart
