By Topic

An FPGA-based stereoscopic camera - electronic design tools and techniques

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Andorko, I. ; Coll. of Eng. & Inf., Nat. Univ. of Ireland, Galway, Ireland ; Corcoran, P. ; Bigioi, P.

Electronic design tools and techniques for the implementation of a stereoscopic camera based on an FPGA (Field Programmable Gate Array) are presented. The stages of an IPP (Image Processing Pipeline) are presented together with the development tools and languages used to implement a stereoscopic camera in hardware. In a further development of the basic system, aspects of the implementation of a 3D camera are presented.

Published in:

Roedunet International Conference (RoEduNet), 2010 9th

Date of Conference:

24-26 June 2010