Home  |   Login  |   Logout  |   Access Information  |   Alerts  |   Purchase History  |   Cart  |   Sitemap  |   Help   
 
Browse Technology Surveys
BROWSE SEARCH IEEE XPLORE GUIDE SUPPORT
CEDA
 
» Editor
Enrico Macii
Politecnico di Torino
Dip. di Automatica e Informatica Corso Duca degli
Abruzzi 24
10129 Torino, Italy
enrico.macii@polito.it

» Fundamental and
  Additional References
View all references

» Contributors
Section 1
Wolfgang Nebel
OFFIS
nebel@offis.de

Marios Papaefthymiou
University of Michigan
marios@eecs.umich.edu
Section 2
David Z. Pan
University of Texas
dpan@ece.utexas.edu

Mircea Stan
University of Virginia
mircea@virginia.edu
Section 3
Luca Benini
Universita` di Bologna
lbenini@deis.unibo.it

Enrico Macii
Politecnico di Torino
enrico.macii@polito.it
Section 4
Vijaykrishnan Narayanan
Pennsylvania State University
vijay@cse.psu.edu

Kevin Skadron
University of Virginia
skadron@cs.virginia.edu

Section 5
Naehyuck Chang
Seoul National University
naehyuck@snu.ac.kr

Youngsoo Shin
KAIST
youngsoo@ee.kaist.ac.kr

 
IEEE Technology Surveys   » Survey
 

CAD Algorithms, Methods and Tools For Low-Power Circuits and Systems

Editor: Enrico Macii
January 2006

e
Survey Sections

       » Section 1: Power Estimation at All Levels of Abstraction
       » Section 2: Physical Design and Interaction With Technology
       » Section 3: Logic/RTL Synthesis and Optimization
       » Section 4: Architectural/System Design and Optimization
       » Section 5: Software Design and Dynamic Power Management

e
Abstract

Low power consumption has become one of the most important features of modern electronic devices, due to several factors, ranging from the increased market share of mobile and portable systems for telecom and computing to the increased cost of implementing, packaging and manufacturing circuits working at high speed and temperature. In the beginning, the power problem has been faced manually, thanks to the development of ad-hoc design techniques, mainly applied at the low levels of abstraction (i.e., from physical design up to the gate-level). The increased complexity of modern electronic systems, facilitated by the advent of aggressively scaled technologies, and the augmented pressure of time-to-market constraints, called for automated design support. As a consequence, in the last few years, novel CAD algorithms, and methods that enable tight power consumption control during design have been the subject of extensive research, then originating powerful tools and design frameworks that can deal with power optimization at different levels of the design hierarchy.

Power dissipation has become a critical design metric for an increasingly large number of VLSI circuits. The exploding market of portable electronic appliances fuels the demand for complex integrated systems that can be powered by lightweight batteries with long times between re-charges. Additionally, system cost must be extremely low to achieve high market penetration. Both battery lifetime and system cost are heavily impacted by power dissipation. The last decade has thus witnessed a growing interest in low-power design, resulting in a tremendous research effort for the development of new design techniques, algorithms, methods and tools for controlling power during the various stages of the design process.

The scientific literature covering various aspects of low power design technologies is vast; as such, the non-expert reader may find difficulties in retrieving the appropriate contributions that may help him/her in getting quickly in control of the subject. This survey will provide the reader with a terse, yet complete and easy to navigate, reference to the leading-edge technologies for low power design of digital electronic circuits and systems.

Indexed by IEE Inspec
© Copyright 2009 IEEE – All Rights Reserved