Summary: This course will begin with an introduction to industrial control systems (SCADA, DCS, PLC, RTU, IED, field devices, meters, etc) and will explain what makes control systems different than business IT. Potential mitigation approaches including policies and technologies will be discussed. Example control system cyber events and their ramifications will be presented. Finally, current industry and government activities to secure ICS will be discussed.
Summary: This course will familiarize learners with the need to strengthen the protection of the control systems used in the industry against cyber (electronic) threats. The control systems addressed include SCADA systems, IEDs, substation automation systems, and distribution control systems. The course will identify the major threats, and outline practical suggestions about how the security of these systems may be enhanced. After completing this course you should be able to develop an understanding of: Issues relating to cyber security (Why do people care about this subject?); The threats to the security of control systems (Who are the intruders, and why do they do what they do?); What makes control systems vulnerable to intrusion?; Industry’s experience is with breaches of security? (Separating the myths from the reality); What utilities are required or advised to do to protect their systems (Rules, regulations, and standards: steering through the regulatory thicket); What utilities can do now to protect their systems (Practical steps that go beyond what is currently required.); Anticipated future developments to enhance the cyber security of control systems.
Summary: This course reviews the present-day on-chip wiring design practices and the special characteristics of on-chip lossy transmission lines. The deficiencies of present-day RC-circuit-representation-based designs and tools are highlighted through relevant examples. Guidelines are given for how to use controlled transmission line structures and design practices are discussed for best optimizing the wiring structure and design methodologies to circumvent the negative effects and best utilize the transmission line properties in the framework of improved technological advances. CAD tool development needs are explained for wire-aware chip architecture and for migrating to performance-driven routers and layout with R(f)L(f)C interconnect representation. The large, integrated chips that are including major portions of the overall system are inheriting all the problems that package designers have faced for many years. It is explained how the system-on-chip concept needs to adopt and adapt the tools, understanding, and practices used for designing chip-to-chip interconnections.
Summary: This course delves further into the present-day on-chip wiring design practices and the special characteristics of on-chip lossy transmission lines. A new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses. The methodology uses lossy transmission-line power-blocks with frequency-dependent properties and the interaction between delta-I noise, common-mode noise, and crosstalk and their effect on timing is illustrated with simulations using representative driver and receiver circuits and on-chip interconnections.
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