System-in-package testing: problems and solutions
Appello, D.; Bernardi, P.; Grosso, M.; Reorda, M.S.
Design & Test of Computers, IEEE
Volume 23, Issue 3, May-June 2006 Page(s):203 - 211
Digital Object Identifier   10.1109/MDT.2006.79
Summary:System-in-package integrates multiple dies in a common package. Therefore, testing SiP technology is different from system-on-chip, which integrates multiple vendor parts. This article provides test strategies for known good die and known good substrate in the SiP. Case studies prove feasibility using the IEEE 1500 test structure

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