Test requirements for embedded core-based systems and IEEE P1500
Zorian, Y.
Test Conference, 1997. Proceedings., International
Volume , Issue , 1-6 Nov 1997 Page(s):191 - 199
Digital Object Identifier 10.1109/TEST.1997.639613
Summary:Chips comprising reusable cores, i.e. pre-designed Intellectual
Property (IP) blocks, have become an important part of IC-based system
design. Using embedded cores enables the design of high-complexity
system-chips with densities as high as millions of gates on a single
die. The increase in using pre-designed IP cores in system-chips adds to
the complexity of test. To test system-chips adequately, test solutions
need to be incorporated into individual cores and then the tests from
individual cores need to be scheduled and assembled into a chip level
test. However with the increased usage of cores from multiple and
diverse sources, it is essential to create standard mechanisms to make
core test plug-and-play possible. This paper discusses in general the
challenges in testing core-based system-chips and describes their
corresponding test solutions. It concentrates on the common test
requirements and introduces the on-going standardization efforts,
specifically under IEEE P1500 Working Group, which is meant to
standardize the interface between a core test and its host the
System-on-Chip
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